Wednesday, June 19, 2019

RC and RI circuits Lab Report Example | Topics and Well Written Essays - 1250 words

RC and RI circuits - Lab Report ExampleThe data and observation were recorded whilst simulating the above circuits.RC circuit contain both immunity connected in series and the capacitor. The system can be used to control timing. When DC voltage source is connected crosswise an uncharged capacitor, the stray at which the capacitor charges up decrease as eras passes and the frequency changesThe objectives of the experiment was to investigate how the voltage across varies as it charges and to find its capacitive time constant. The circuit investigated the phase angle between each frequency at different voltage for both the input and make voltage. It aims at verifying the disposition of the account amplitude for every output and input wave front formThe experiment was undertaken in accordance with the underlying laboratory procedure. Computation connote values of V(t).The circuits for charging and corresponding discharging the capacitor were sketched. They were wired in order to f ully charged or discharge by switching the circuits. The apparatus was connected as shown in the diagram above and their frequencies were set in the time setting as shown above. Measurement was taken from the different frequency across, voltage noted across frequency, and a table was form to tabulate the phase angle for each frequency. The tabulated measurement was used for calculation and drawing of the graph. The graphs draw was used to tabulate the for the peak amplitude for both input and output.The circuit A and circuit B had peak amplitude for the output is 10v/Dv and corresponding input peak amplitude of 7.5v/Dv. In circuit C peak amplitude was 10V/Dv whilst the input peak amplitude was 8V/DvAs the frequency escalates from 100Hz to 10 kHz the corresponding output, voltage reduces from 9.9v to 0.718v. Thus, plotting the underlying output voltage against the input frequency, the output voltage becomes 70.7% of the input voltage gives asThe output signal is attenuated to 70.7% o f the underlying input

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